PMR-171 Teardown

PMR-171 radio

The PMR-171 is a portable all-band SDR transceiver that I recently got my hands on. Naturally I’m curious to know how this HF/VHF/UHF portable SDR works. This post covers the major ICs, signal chains, and how everything connects at a high level.

Overview

The PMR-171 covers 100 kHz to 2 GHz (for receive at least) across most common amateur modes: SSB, CW, AM, FM, FT8, RTTY, and optionally DMR. It’s built around a dual-conversion architecture with a built-in automatic antenna tuner covering 4m through 160m, an internal sound card, and CAT control over a single USB-C connection. The radio has reverse polarity protection on the DC input, weighs under 2 kg, and ships as a complete package with a snap-on 5 Ah battery carrier.

The reference oscillator is reportedly a TCXO rated at ±0.5 ppm from -10°C to 60°C. There’s Bluetooth for wireless control (including FT8 operation without a wired common-mode interference path), an Ethernet port (doesn’t seem functional yet), and optional DMR, GPS, and compass/barometer modules.

Some position it in the same space as the Icom IC-705, Xiegu X6100, and Yaesu FT-817. A do-everything portable SDR at a lower price point from a smaller manufacturer. Whether it delivers on all of that is a separate discussion; this post is just about what’s inside.

Upper PCB

The upper board carries the radio’s main processing and RF control circuitry. The key ICs are labeled below. The board is essentially single-sided. The bottom has only three flat ribbon connectors: one small connector for LAN, one small connector for some kind of control, and one large connector likely for the filter/switching control bus.

PMR-171 upper PCB top view showing major ICs and RF components

A Selection of Close-Ups

Bottom Assembly

The bottom assembly carries the RF power amplifier boards and a few additional modules. Two separate PA chains are visible: an HF path (RD06HHF1, 30 MHz / 6 W) fed from the HF_TX U.FL on the main PCB, and a VHF/UHF path (two RD15HVF1, 15 W each) fed from UV_TX. Each chain has an HMC482ST89 gain block ahead of the final transistors. Several additional RF power transistors appear in the VHF/UHF section marked “BK 235” and “UFF 3E” (part numbers not fully resolved). The GNSS module and IMU are not typical for a portable transceiver and suggest positioning/motion logging capability.

The HF amplifier circuitry is integrated directly onto the main bottom PCB, which takes up most of the assembly footprint. The VHF/UHF amplifier is a separate daughterboard mounted on top — it doesn’t appear to be a generic off-the-shelf module; the construction is consistent with Guohotec’s own hardware, though I didn’t dig further into its provenance.

PMR-171 bottom assembly top view

A Selection of Close-Ups

Rear RF Assembly

The rear of the bottom assembly is occupied by a multi-level structure of relays, toroids, and coax interconnects. This is the HF antenna tuner. The ATU covers 4m through 160m per the spec sheet, and the density of switching relays and wound inductors here is consistent with a switched L-network or similar topology that steps through combinations of inductance and capacitance to match the antenna. Some of the same relay/toroid assembly likely also handles output filtering to clean up the PA output before it reaches the antenna port, though I didn’t trace that in detail.

Connectors and I/O

Nothing unusual on the connector panel. From what I could observe, there’s no dedicated logic circuitry in this area — the connections appear to route directly back to the upper PCB. I didn’t examine this closely.

Battery

PMR-171 battery pack

The 5 Ah battery pack attaches to the back of the radio. The cells appear to be potted. A fully potted pack with no venting and incompressible packaging is probably not ideal. I didn’t open the pack to find out, so for now this is an open question.

The sticker is my own addition.

System Architecture

The upper PCB is organized into named functional blocks, each silkscreened on the board. The diagram below shows how they connect (inter-block signals only, internal routing omitted). Inferred from component placement and datasheet-typical usage; not verified by tracing.

graph LR
    classDef dsp fill:#fbe9e7,stroke:#bf360c,color:#333,font-weight:bold
    classDef rf fill:#cfe2f3,stroke:#1565c0,color:#333
    classDef audio fill:#e8f5e9,stroke:#2e7d32,color:#333
    classDef ext fill:#dcedc8,stroke:#558b2f,color:#333,stroke-width:2px
    classDef block fill:#f5f0eb,stroke:#999,color:#333

    subgraph CTRL["Control"]
        DSP["DSP<br/>STM32H743"]:::dsp
        LAN["LAN<br/>LAN8720A"]:::block
    end

    subgraph TXCHAIN["Transmit Chain"]
        LO["LO<br/>MS5351M · BK4819"]:::rf
        TXBASE["TX_BASE<br/>superhet chain"]:::rf
        TXFILTER["TX_FILTER<br/>filter banks"]:::rf
    end

    subgraph RFPATH["RF"]
        RFBOARDS(["Lower RF Assembly<br/>Amplifiers, Filters, ATU"]):::ext
        ANTENNA(["Antennas"]):::ext
    end

    subgraph RXCHAIN["Receive Chain"]
        RX["RX<br/>filter banks · MSi001"]:::rf
    end

    subgraph AUDIOCHAIN["Audio"]
        ADDAC["ADDAC<br/>WM8731L"]:::audio
        AUDIOOUT["AUDIO OUT<br/>TC8002D x2"]:::audio
        SPKR(["Speakers / Headset"]):::ext
    end

    DMRMOD(["DMR Module"]):::ext
    NET(["Ethernet RJ45"]):::ext

    DSP -->|"RMII"| LAN <--> NET
    DSP -->|"HPI"| DMRMOD
    DSP -->|"I2C"| LO
    DSP -->|"I2S"| ADDAC
    DSP -->|"I2C"| TXFILTER
    DSP -->|"I2C"| RX

    LO -->|"clocks + LO RF"| TXBASE
    LO -->|"BK4819 audio"| AUDIOOUT

    ADDAC -->|"TX baseband"| TXBASE
    DMRMOD -->|"TX RF"| TXBASE
    TXBASE -->|"RF"| TXFILTER
    TXFILTER --> RFBOARDS
    RFBOARDS <-->|"TX / RX"| ANTENNA
    RFBOARDS -->|"RX"| RX
    RFBOARDS -->|"DMR RX"| DMRMOD

    RX -->|"baseband"| ADDAC
    DMRMOD -->|"decode audio"| AUDIOOUT
    ADDAC -->|"audio"| AUDIOOUT
    AUDIOOUT --> SPKR
DSP RF block Audio block External / connector Other IC

Transmitter Signal Chain

The TX path is a classic superheterodyne: baseband is modulated to a 49.95 MHz IF using the CBTLV3253 analog mux as a switching mixer, cleaned up by a crystal filter, then upconverted to final frequency by the LT5560. The FM3418 switch selects between this superhet path, the BK4819’s own analog FM output, and the DMR module: three completely independent transmit paths converging at a single point before the gain block.

The 49.95 MHz switching clock is derived by running CLK2 (199.8 MHz) through the 74LCX74 configured as a ÷4 divider chain, producing a clean 50% duty-cycle square wave, which is exactly what you want driving a switching mixer.

graph TD
    classDef lo fill:#cfe2f3,stroke:#1565c0,color:#333,font-weight:bold
    classDef rf fill:#f5f0eb,stroke:#999,color:#333
    classDef mixer fill:#fff9c4,stroke:#f9a825,color:#333,font-weight:bold
    classDef amp fill:#fce4ec,stroke:#c62828,color:#333
    classDef conn fill:#dcedc8,stroke:#558b2f,color:#333,stroke-width:2px
    classDef sw fill:#ede7f6,stroke:#4527a0,color:#333,stroke-width:2px
    classDef pass fill:#eeeeee,stroke:#616161,color:#333
    classDef div fill:#e8f5e9,stroke:#2e7d32,color:#333
    classDef dsp fill:#fbe9e7,stroke:#bf360c,color:#333,font-weight:bold

    MCU["MCU<br/>STM32H743"]:::dsp
    WM8731L["Audio Codec<br/>WM8731L"]:::dsp
    GS8554["Input Conditioning<br/>GS8554"]:::amp
    MUX["Switch Mixer<br/>CBTLV3253<br/>49.95 MHz clock"]:::mixer
    BAL1(["Balun"]):::pass
    FILTER1["IF Filter<br/>49910GQ9<br/>49.9 MHz"]:::rf
    BAL2(["Balun"]):::pass
    LT5560["Upconvert Mixer<br/>LT5560<br/>Fout = FLO − 49.95 MHz"]:::mixer
    BAL3(["Balun"]):::pass
    FMSWITCH["TX Path Select<br/>FM3418"]:::sw
    HMC482["Gain Block<br/>HMC482ST89"]:::amp
    TXFILT(["To TX Filter Bank"]):::conn

    MS5351M["LO Generator<br/>MS5351M"]:::lo
    FLIPFLOP["74LCX74<br/>Div-4<br/>199.8 → 49.95 MHz"]:::div
    BK4819S["FM Transceiver<br/>BK4819"]:::rf
    LOBA(["Balun"]):::pass
    LOFILT["LO Filter"]:::rf
    DMRMOD(["DMR Module<br/>self-contained"]):::conn
    UNK(["CLK1 22 MHz<br/>dest. unknown"]):::rf

    MCU -->|"I2S"| WM8731L --> GS8554 -->|"conditioned audio"| MUX
    MUX -->|"IF 49.95 MHz"| BAL1 --> FILTER1 --> BAL2 -->|"IF in"| LT5560
    LT5560 --> BAL3 -->|"TX — superhet"| FMSWITCH --> HMC482 --> TXFILT

    MS5351M -->|"CLK0 26 MHz"| BK4819S -->|"TX — analog FM"| FMSWITCH
    MS5351M -->|"CLK1 22 MHz"| UNK
    MS5351M -->|"CLK2 199.8 MHz"| FLIPFLOP -->|"49.95 MHz sq. wave"| MUX
    MS5351M -->|"LO = IF + Fout"| LOBA --> LOFILT -->|"LO in"| LT5560
    DMRMOD -->|"TX — DMR"| FMSWITCH
LO / Clock Divider Mixer Amplifier Switch Passive External MCU / DSP

TX Filter Bank

After the HMC482ST89 gain block, the signal enters the TX_FILTER section: a two-stage switching tree that routes it through one of ~13 band-pass or low-pass filters before the RF boards. An FM3418 at the input selects the frequency group (HF low, HF mid, or VHF/UHF), a second-level FM3418 selects the individual filter within that group, and a mirrored collection tree reassembles the three paths back to a single FM3418 output switch. An NCA9555 I/O expander handles all the switch control lines via I²C from the MCU.

Filter ordering within each switch is by PCB position; switch port assignments are not verified. Two filters (LPF 80 MHz and LPF 300 MHz) are unpopulated on this unit. All FM3418 switch control lines are driven by an NCA9555 I/O expander via I²C from the STM32H743.

graph TD
    classDef sw fill:#ede7f6,stroke:#4527a0,color:#333,stroke-width:2px
    classDef amp fill:#fce4ec,stroke:#c62828,color:#333
    classDef conn fill:#dcedc8,stroke:#558b2f,color:#333,stroke-width:2px
    classDef bandnp fill:#f5f5f5,stroke:#9e9e9e,color:#999
    classDef pass fill:#eeeeee,stroke:#616161,color:#333

    HMCIN["From TX Base"]:::amp

    TOPIN["FM3418<br/>Input Select"]:::sw
    S1["FM3418<br/>(HF low)"]:::sw
    S2["FM3418<br/>(HF mid)"]:::sw
    S3["FM3418<br/>(VHF/UHF)"]:::sw

    F1A(["3.5–4.0 MHz"]):::pass
    F1B(["1.8–2.0 MHz"]):::pass
    F1C(["7–7.3 MHz"]):::pass
    F1D(["4.8–5.2 MHz"]):::pass
    F1E(["LPF 80 MHz · NP"]):::bandnp

    F2A(["17–24 MHz"]):::pass
    F2B(["13.5–15.3 MHz"]):::pass
    F2C(["50–70 MHz"]):::pass
    F2D(["24.5–31.7 MHz"]):::pass

    F3A(["400–480 MHz"]):::pass
    F3B(["131–300 MHz"]):::pass
    F3C(["LPF 300 MHz · NP"]):::bandnp
    F3D(["LPF 4000 MHz"]):::pass

    OUT1["FM3418<br/>Output A"]:::sw
    OUT2["FM3418<br/>Output B"]:::sw
    OUT3["FM3418<br/>Output C"]:::sw
    OUTFIN["FM3418<br/>Output Select"]:::sw
    SPLIT(["Splitter"]):::pass
    UVTX(["UV_TX · U.FL"]):::conn
    HFTX(["HF_TX · U.FL"]):::conn

    HMCIN --> TOPIN
    TOPIN --> S1 & S2 & S3

    S1 --> F1A & F1B & F1C & F1D & F1E
    S2 --> F2A & F2B & F2C & F2D
    S3 --> F3A & F3B & F3C & F3D

    F1A & F1B & F1C & F1D & F1E --> OUT1
    F2A & F2B & F2C & F2D --> OUT2
    F3A & F3B & F3C & F3D --> OUT3

    OUT1 & OUT2 & OUT3 --> OUTFIN
    OUTFIN --> SPLIT
    SPLIT --> UVTX & HFTX
Amplifier Switch Passive External Passive (not populated)

Receiver Signal Path

The RX section routes the incoming signal from a U.FL connector through a protection diode into a splitter (an “F”-marked component, function not fully resolved). The signal is split into two parallel paths: one passing directly through, and one through a “TAt”-labeled device that appears to be an LNA. The paths recombine at a combiner before reaching the filter bank.

An FM3418 selects between three HF filters and a second FM3418 for VHF/UHF. The three HF filter outputs recombine in a third FM3418 which feeds MSi001 pin 39 (HF input). The VHF/UHF FM3418 feeds four filters to the MSi001’s separate per-band LNA inputs at pins 10, 3, 6, and pins 24/25 (L-Band, confirmed from a community schematic).

The MSi001 also requires a reference clock; it is typically paired with the MSi2500 and both run at 24 MHz. CLK1 on the MS5351M is set to 22 MHz (close but not the canonical value), which may reflect some other system constraint making 22 MHz easier to generate than 24 MHz. The tuner’s I/Q baseband output feeds back to the ADDAC/DSP section.

There’s also a group of SN74CBT3251s and SN74LV4066As just southwest of the WM8731L CODEC that presumably handles routing of different signals to/from the WM8731L’s ADCs and DACs. I’ve left this detail out of the diagram below.

The MSi001 seems to be China-market only with limited official documentation. Pin assignments are inferred from a community-sourced development board schematic; the frequency ranges shown are what that board uses and do not necessarily reflect the filter values in this design.

graph TD
    classDef sw fill:#ede7f6,stroke:#4527a0,color:#333,stroke-width:2px
    classDef amp fill:#fce4ec,stroke:#c62828,color:#333
    classDef conn fill:#dcedc8,stroke:#558b2f,color:#333,stroke-width:2px
    classDef pass fill:#eeeeee,stroke:#616161,color:#333
    classDef rf fill:#cfe2f3,stroke:#1565c0,color:#333,font-weight:bold
    classDef dsp fill:#fbe9e7,stroke:#bf360c,color:#333

    RXIN(["RX · U.FL"]):::conn
    DIODE(["Protection Diode"]):::pass
    SPLT(["Splitter"]):::pass
    LNA["LNA"]:::amp
    LNAEN["GPIO Enable"]:::dsp
    COMB(["Combiner"]):::pass

    SW1["FM3418<br/>RX Filter Select"]:::sw
    HF1(["HF Filter 1"]):::pass
    HF2(["HF Filter 2"]):::pass
    HF3(["HF Filter 3"]):::pass
    SW3["FM3418<br/>HF Combine"]:::sw

    SW2["FM3418<br/>VHF/UHF Select"]:::sw
    F50(["50–120 MHz Filter"]):::pass
    F120(["120–250 MHz Filter"]):::pass
    F400(["400–1000 MHz Filter"]):::pass
    FDIFF(["L-Band Filter"]):::pass

    REFCLK(["Ref Clock"]):::rf
    MSi001["MSi001<br/>FlexiRF Tuner"]:::rf
    IQ(["I/Q Output<br/>to ADDAC / DSP"]):::conn

    RXIN --> DIODE --> SPLT
    SPLT -->|"direct"| COMB
    SPLT --> LNA --> COMB
    LNAEN -.->|"enable"| LNA

    COMB --> SW1
    SW1 --> HF1 & HF2 & HF3
    SW1 -->|"VHF/UHF"| SW2

    HF1 & HF2 & HF3 --> SW3
    SW3 -->|"pin 39 · HF"| MSi001

    SW2 --> F50 & F120 & F400 & FDIFF
    F50 -->|"pin 10 · 50–120 MHz"| MSi001
    F120 -->|"pin 3 · 120–250 MHz"| MSi001
    F400 -->|"pin 6 · 400–1000 MHz"| MSi001
    FDIFF -->|"pins 24, 25 · L-Band"| MSi001
    REFCLK -->|"refclk"| MSi001
    MSi001 --> IQ
External Passive Amplifier Switch Tuner IC / Clock MCU / DSP

General Thoughts

Overall, the PMR-171 is reasonably well built. The design is ambitious, the component selection makes sense, and most of the assembly is clean. A few areas are inconsistent with the overall standard of the rest of the work.

Staking

Staking is inconsistent across the RF assembly. Some toroids and relay cans are properly secured; others aren’t. One toroid is completely free to move, leaving the enamel wire to provide all mechanical support while abrading against the ferrite core. That’s a reliability concern for a portable radio.

Unstaked toroid on the lower RF assembly, free to move and abrade the enamel wire coating

Soldering Quality

Most of the boards look clean. The upper main board and the HF amplifier board are fine. The VHF/UHF amplifier board is noticeably rougher. Joints are less consistent, and the overall cleanliness is a step below the rest. I also found small FOD on the PCBs, including metal filings.

Mechanical Design and Construction

I like the way that the electronics have their own sub-chassis which is held inside the outer case. I could complain about not having rubber bumpers for putting this on a desk, but that would be quite pedantic.

There’s also the matter of the cooling fans and their mounting hardware.

Just joking of course....

Value

The assembly quality in a few areas doesn’t match the price point. The base radio is not unreasonably priced given the niche it occupies, but the assembly inconsistencies described above shouldn’t be showing up at this price point.

The optional modules are harder to justify. The DMR module doesn’t appear to be fully functional, and the GPS module doesn’t seem worth it either. The integration on both feels incomplete relative to what the add-on price implies.

Disclaimer

This analysis is based entirely on visual inspection, component identification, and datasheet research. The block diagrams and signal chain descriptions are inferred from datasheet-typical usage patterns and the physical placement of components on the board, not from verified traces. Some assumptions are almost certainly wrong.

Written on February 27, 2026